Onchip Variation


Onchip Variation and pvt
Process :which depends on the technology node(45nm ,90nm)which indicates
I =U cox W/L(vgs - vt)2 ,where L increase which affects the Drain current Id,
For The same Temperature and voltage values ,the current required for 45nm would be more than the current for 65nm
voltage :the voltage increase the delay decreases (faster the charging and Discharging)
The voltage may be drop or increase at some times ,so the design must work in that scenario.
Temperature : The climate changes can be -40 degrees and can be +50 degrees ,it have to work in between this conditions ,
HIgher the temperature ,the collision of electrons will me more ,the less electrons move and the less current,so the delay will be more.

Onchip Variation : The oxide and poly shape will not be straight line after etching ,it is irregular ,this may effect the drain current and capacitance ,where the delay will be increased or can be decreased due to change in the width of poly.
eg:
 if inverter of same size can have different delays due to their shape(due to etching)
delay is 100.
it can change -90 or -110 ,
so that the cell have to work for the both delay values.
this is on chip variation

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